Sample channel processors are frequently used in signal processing circuits to enable accurate reading of high frequency signals of devices such as communication channels (modems), disk drive read channels, CD ROMs, and recording channels. These systems essentially consist of an encoder/transmitter which receives data input comprising a series of state transitions, and the channel which receives the encoded data input and frequently introduces unwanted distortions and noise. The channel output is delivered to a filter which removes noise and samples the encoded signal, after which a detector determines whether a signal transition has occurred based on the samples taken from the filter, and a decoder provides data output based on the detected signal. For successful data transmission, the data output should be the same as the data input. The effectiveness of the data transmission depends on how accurately the sampled data represents the actual input data signal.
As technological advances enable devices to operate at increased data rates, the transitions occur closer together in time, making it more difficult to filter out channel noise and retain the integrity of the original input data signal based on the data samples taken. A number of prior art methods have been developed to overcome this problem.
One simple approach to overcoming this problem is to use a Decision Feedback Equalizer (DFE). A Decision Feedback Equalizer (DFE) uses one data sample to determine whether or not a transition has occurred in the input data signal. A DFE circuit essentially consists of a filter, an adder, a detector (usually a comparator) and a feedback equalizer. The filter concentrates the energy of the input signal so that the amplitude of the signal exceeds a predetermined detection threshold, and takes one sample from the incoming signal. The remaining signal information is discarded. The comparator looks at the amplitude of the sample and detects whether or not the sample has exceeded the predetermined threshold, indicating that a state transition has occurred. The feedback equalizer responds to the output of the detector, adding a feedback signal to the input of the comparator, thus incorporating signal information from the previous sample into the processing of the current sample. Problems with this technique include loss of important signal information because of the reliance on only one sample and distortion of the input signal.
A more complicated but more accurate method of overcoming the problem of retaining data integrity at high data rates is the Fixed Delay Tree Search (FDTS) detector. A Fixed Delay Tree Search (FDTS .tau.=2) detector uses samples to make a decision as to whether a signal bit has been detected. The three samples are taken at predetermined intervals and include a current sample and the two previous samples. The advantage to this approach is that a more accurate decision can be made since more samples are used. The disadvantage to this approach is that keeping track of all the samples requires more circuitry including more comparators, adders and multipliers.